3. problem solving questions a. assume that we have an application with a total of 500,000 instructions where 20% of them are the load/store instructions with an average cpi of 6 cycles, and the rest instructions are alu instructions with average cpi of 1 cycle. if we double the clock rate without optimizing the memory latency, the average cpi for load/store instruction will also be doubled to 12 cycles. what is the speedup after this change? b. consider an application where 50% of the application can be parallelized with 2 cpus. what is the speedup if we use two cpus instead of one? c. in this problem, we assume that the following mips code is executed on a pipelined processor with a 5-stage pipeline, full forwarding, and a predict-not-taken branch predictor: